Course Overview:

The Computer Organization and Architecture course is a fundamental exploration of the inner workings of computer systems, providing insight into the hardware and structure that enables the digital world we interact with daily. It delves into the design principles, components, and operations of computers, offering a comprehensive understanding of how software interacts with hardware to perform tasks efficiently and reliably. This course covers a broad range of topics, from the basic building blocks of a computer’s central processing unit (CPU) and memory to more advanced concepts such as pipelining, cache memory, and parallel processing. Students will learn about various instruction set architectures (ISAs) and how they influence a computer’s performance and capabilities. Furthermore, the course delves into the intricacies of data representation, addressing modes, and memory hierarchies. It also explores the role of input and output systems, as well as the impact of various architectural choices on a computer’s overall performance. By the end of this course, you will have a solid foundation to appreciate the complex interplay between software and hardware that powers the digital age.

Prerequisite:

  • The students must have completed grade 12 or equivalent education.
  • Must pass in-house designed entry exam covering basic math, algebra, and calculus (minimum score 60%).
  • Students from non-English speaking countries must pass the English Language Proficiency Test.
  • English Language Proficiency Test scores (IELTS – 6.0, TOEFL – 70, PTE – 45, CAEL – 70, CAE – 176, Duolingo – 110, Password – 6.5, and PTE – 61) are acceptable.

Learning Outcomes:

  • Recall Boolean logic principles, encompassing basic logic gates, truth tables, and both combinational and sequential logic.
  • Identify core components of a computer system like the ALU, registers, memory, buses, and the control unit.
  • Clarify the fetch-decode-execute cycle and its role in CPU instruction processing.
  • Outline the effectiveness of memory hierarchy through mechanisms like cache, R
  • Enhance processor performance by applying pipelining techniques.
  • Utilize assembly language commands for various operations like arithmetic, data transfer, and memory operations.
  • Distinguish between RISC and CISC processor designs, focusing on performance, efficiency, and intricacy.
  • Investigate the trade-offs between parallelism and memory contention in multiprocessor systems.
  • Design an embedded system processor catering to precise functional prerequisites.
  • Construct an assembly language program translating a provided high-level algorithm.
  • Assess the efficiency of different interleaved memory systems.
  • Propose the most suitable pipelining and caching methods for a microprocessor, targeting optimal speed and efficiency.

Course Content & Topics:

Class 1: Introduction to Digital Logic Boolean Algebra
Class 2: Data Representation
Class 3: Processor Architecture
Class 4: Instruction Set Architecture (ISA)
Class 5: Microarchitecture
Class 6: Memory Organization
Class 7: Storage Systems
Class 8: Assembly Language
Class 9: Parallel Architecture
Class 10: Interfacing and Communication
Class 11: Performance
Class 12: Integration of Concepts
Class 13: Review and Case Studies

Final Exam: MCQs and a case study project

Credit Information:

  • Credits: 3

Duration:

  • 14 Weeks: 3 hrs/week

Course & Related Fees:

  • Domestic Students : $650 (Six hundred and fifty dollars)
  • International Students: $750 (Seven hundred and fifty dollars)

For a detailed breakdown, please refer to Policy #S-005B IT & Network Management Diploma and Course Fee Schedule

Non-Refundable Fees:

  • Application Fee: $50.00/course (payable online and non-refundable)